1. Field of the Invention
The present invention relates to an electronic device including a thin film transistor.
2. Related Background Art
In recent years, the development of a thin film transistor (hereinafter, abbreviated to TFT) in which a polycrystalline of amorphous semiconductor film has been increasingly used mainly as an electronic device having a large area.
FIGS. 1 and 2 are diagrammatical views showing schematically two fundamental structures of conventional thin film transistors. In these diagrams, reference numeral 1 denotes a substrate; 2 is a thin polycrystalline or amorphous semiconductor film; 3 is a gate insulative film; 4 is a gate electrode; and 5 and 6 are source and drain electrodes. The TFT of FIG. 1 has what is called a coplanar structure (coplanar type) such that the gate electrode 4 source electrode 5, and drain electrode 6 are arranged on the same side of the thin semiconductor film 2. The TFT of FIG. 2 has so-called a stagger structure (stagger type) such that the gate electrode 4 is arranged below the thin semiconductor film 2 and the source electrode 5 and drain electrode 6 are arranged over the film 1.
In the thin film transistors of the above structures, the relative position accuracies among the gate electrode 4 and the source and drain electrodes 5 and 6 are important. Upon patterning of the source and drain electrodes, it is most desirable that the edge of the source and drain electrodes coincide with and are aligned with the edge of the gate electrode. For this purpose, highly accurate mask alignment is necessary. Therefore, hitherto, the gate electrode and the source and drain electrodes are partially overlapped, the positional deviations among them are absorbed by the overlap portions.
However, in the TFTs having the conventional structures mentioned above, the ON/OFF operations are merely assured and the noise components included in the output signal can substantially be controlled at a practical level. That is, a parasitic capacitance which is generated due to the overlap portions among the gate electrode and the source and drain electrode causes a variation depending on the alignment accuracy of a mask used when patterning. Further, there is a case where a large variation is caused in the offset components in the output signal.